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Previous year question hub

Diode Circuits - Analog Circuits - Electronics & Communication Engineering Previous Year Questions

Practice Diode Circuits - Analog Circuits - Electronics & Communication Engineering previous year questions organised from real papers, with year-wise coverage and clear topic navigation.

26Papers
18Years
46Questions
1Topics

Diode Circuits question pattern

Every graph below is calculated only from this selection.

Questions by year

Compare question counts across years.

Difficulty distribution

How the classified questions are distributed by difficulty.

Medium 41 89.1%
Easy 4 8.7%
Hard 1 2.2%

Question type distribution

MCQ, numerical, multiple-select and other formats found in these papers.

MCQ 30 65.2%
Numerical Answer Type (NAT) 13 28.3%
MSQ 2 4.3%
Fill in the blanks 1 2.2%

Subject weightage

Top subjects by unique question coverage.

Electronics & Communication Engineering
46 Qs

Most asked topics

Top topics across the included previous year papers.

Analog Circuits
46 Qs

Subtopic coverage

Top subtopics inside this exact selection.

Diode Circuits
46 Qs

Paper coverage

Question coverage for the most populated papers. Every active PYP paper remains listed below.

Electronics and Communication Engineering (EC) 2026
1 Qs
Electronics & Communication Engineering (EC) 2025
2 Qs
Electronics & Communication Engineering (EC) 2024
2 Qs
Electronics & Communication Engineering (EC) 2023
1 Qs
Electronics & Communication Engineering (EC) 2022
1 Qs
Electronics & Communication Engineering (EC) 2021
1 Qs
Electronics & Communication Engineering (EC) 2020
1 Qs
Electronics & Communication Engineering (EC) 2019
5 Qs
Electronics & Communication Engineering (EC) 2018
1 Qs
Electronics & Communication Engineering (EC) 2017
2 Qs
Electronics & Communication Engineering (EC) 2017 [Session 2]
2 Qs
Electronics & Communication Engineering (EC) 2016 [Session 2]
3 Qs
Electronics & Communication Engineering (EC) 2016 [Session 3]
2 Qs
Electronics & Communication Engineering (EC) 2016 [Session 1]
1 Qs
Electronics & Communication Engineering (EC) 2014 [Session 1]
1 Qs
Electronics & Communication Engineering (EC) 2014 [Session 2]
1 Qs
Electronics & Communication Engineering (EC) 2014 [Session 4]
1 Qs
Electronics & Communication Engineering (EC) 2013 [Session 3]
3 Qs
Electronics & Communication Engineering (EC) 2013 [Session 4]
3 Qs
Electronics & Communication Engineering (EC) 2013 [Session 1]
2 Qs
Electronics & Communication Engineering (EC) 2013 [Session 2]
2 Qs
Electronics & Communication Engineering (EC) 2012
2 Qs
Electronics & Communication Engineering (EC) 2011
2 Qs
Electronics & Communication Engineering (EC) 2009
1 Qs
Electronics & Communication Engineering (EC) 2008
1 Qs
Electronics & Communication Engineering (EC) 2007
2 Qs

Included previous year papers

Newest papers appear first. Search these papers or sort by year and name.

Paper nameYearPDFAttempt
Electronics and Communication Engineering (EC) 20262026
1 questions in this view
2026
Electronics & Communication Engineering (EC) 20252025
2 questions in this view
2025
Electronics & Communication Engineering (EC) 20242024
2 questions in this view
2024
Electronics & Communication Engineering (EC) 20232023
1 questions in this view
2023
Electronics & Communication Engineering (EC) 20222022
1 questions in this view
2022
Electronics & Communication Engineering (EC) 20212021
1 questions in this view
2021
Electronics & Communication Engineering (EC) 20202020
1 questions in this view
2020
Electronics & Communication Engineering (EC) 20192019
5 questions in this view
2019
Electronics & Communication Engineering (EC) 20182018
1 questions in this view
2018
Electronics & Communication Engineering (EC) 20172017
2 questions in this view
2017
Electronics & Communication Engineering (EC) 2017 [Session 2]2017
2 questions in this view
2017
Electronics & Communication Engineering (EC) 2016 [Session 1]2016
1 questions in this view
2016
Electronics & Communication Engineering (EC) 2016 [Session 2]2016
3 questions in this view
2016
Electronics & Communication Engineering (EC) 2016 [Session 3]2016
2 questions in this view
2016
Electronics & Communication Engineering (EC) 2014 [Session 1]2014
1 questions in this view
2014
Electronics & Communication Engineering (EC) 2014 [Session 2]2014
1 questions in this view
2014
Electronics & Communication Engineering (EC) 2014 [Session 4]2014
1 questions in this view
2014
Electronics & Communication Engineering (EC) 2013 [Session 1]2013
2 questions in this view
2013
Electronics & Communication Engineering (EC) 2013 [Session 2]2013
2 questions in this view
2013
Electronics & Communication Engineering (EC) 2013 [Session 3]2013
3 questions in this view
2013
Electronics & Communication Engineering (EC) 2013 [Session 4]2013
3 questions in this view
2013
Electronics & Communication Engineering (EC) 20122012
2 questions in this view
2012
Electronics & Communication Engineering (EC) 20112011
2 questions in this view
2011
Electronics & Communication Engineering (EC) 20092009
1 questions in this view
2009
Electronics & Communication Engineering (EC) 20082008
1 questions in this view
2008
Electronics & Communication Engineering (EC) 20072007
2 questions in this view
2007

All Diode Circuits previous year questions

Practice every matching question in batches of 20, with every available option.

1
2007 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2007

The correct full wave rectifier circuit is

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2
2007 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2007
For the Zener diode shown in the figure, the Zener voltage at knee is 7 V, the knee current is negligible and the Zener dynamic resistance is 10 \(\Omega\). If the input voltage (\(V_i\)) range is from 10 to 16 V, the output voltage (\(V_o\)) ranges from
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3
2008 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2008

In the following limiter circuit, an input voltage \(V_i = 10\sin 100\pi t\) is applied. Assume that the diode drop is 0.7 V when it is forward biased. The Zener breakdown voltage is 6.8 V.

The maximum and minimum values of the output voltage respectively are

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4
2009 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2009
In the circuit below, the diode is ideal. The voltage \(V\) is given by

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5
2011 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2011
The bias current IDC through the diodes is
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6
2011 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2011
The ac output voltage vac is
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7
2012 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2012
The i-v characteristics of the diode in the circuit given below are \(i = egin{cases} rac{v - 0.7}{500} ext{ A}, & v \geq 0.7 ext{ V} \ 0 ext{ A}, & v < 0.7 ext{ V} \end{cases}\) The current in the circuit is
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8
2012 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2012
The diodes and capacitors in the circuit shown are ideal. The voltage \(v(t)\) across the diode D1 is

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9
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 1]
A voltage 1000 sin \(\omega t\) Volts is applied across YZ. Assuming ideal diodes, the voltage measured across WX in Volts, is

Question diagram

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10
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 1]
Three capacitors C_1, C_2 and C_3, whose values are 10\(\mu\)F, 5\(\mu\)F, and 2\(\mu\)F respectively, have breakdown voltages of 10V, 5V, and 2V respectively. For the interconnection shown below, the maximum safe voltage in Volts that can be applied across the combination, and the corresponding total charge in \(\mu\)C stored in the effective capacitance across the terminals are respectively,

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11
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 2]
A voltage \(1000\sin\omega t\) Volts is applied across YZ. Assuming ideal diodes, the voltage measured across WX in Volts, is
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12
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 2]
In the circuit shown below, the knee current of the ideal Zener diode is 10 mA. To maintain 5 V across \(R_L\), the minimum value of \(R_L\) in \(\Omega\) and the minimum power rating of the Zener diode in mW, respectively, are

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13
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 3]
Three capacitors C1, C2 and C3, whose values are 10μF, 5μF, and 2μF respectively, have breakdown voltages of 10V, 5V, and 2V respectively. For the interconnection shown below, the maximum safe voltage in Volts that can be applied across the combination, and the corresponding total charge in μC stored in the effective capacitance across the terminals are respectively,

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14
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 3]
A voltage 1000 sin ωt Volts is applied across YZ. Assuming ideal diodes, the voltage measured across WX in Volts, is

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15
2013 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2013 [Session 4]
Three capacitors \( C_1 \), \( C_2 \) and \( C_3 \) whose values are 10\(\mu F\), 5\(\mu F\), and 2\(\mu F\) respectively, have breakdown voltages of 10V, 5V, and 2V respectively. For the interconnection shown below, the maximum safe voltage in Volts that can be applied across the combination, and the corresponding total charge in \(\mu C\) stored in the effective capacitance across the terminals are respectively,

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16
2014 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2014 [Session 1]
In the figure, assume that the forward voltage drops of the PN diode D₁ and Schottky diode D₂ are 0.7 V and 0.3 V, respectively. If ON denotes conducting state of the diode and OFF denotes non-conducting state of the diode, then in the circuit,

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17
2014 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2014 [Session 2]
The diode in the circuit shown has \( V_{on} = 0.7 \) Volts but is ideal otherwise. If \( V_i = 5 \sin(\omega t) \) Volts, the minimum and maximum values of \( V_o \) (in Volts) are, respectively,
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18
2014 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2014 [Session 4]
Two silicon diodes, with a forward voltage drop of 0.7 V, are used in the circuit shown in the figure. The range of input voltage \(V_i\) for which the output voltage \(V_o = V_i\), is
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19
2016 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2016 [Session 1]
An AC voltage source \(V = 10 \sin(t)\) volts is applied to the following network. Assume that \(R_1 = 3 \, \Omega\), \(R_2 = 6 \, \Omega\) and \(R_3 = \, \Omega\), and that the diode is ideal.
RMS current \(I_{rms}\) (in mA) through the diode is ______
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20
2016 · Electronics & Communication Engineering · Analog Circuits · Diode Circuits
Electronics & Communication Engineering (EC) 2016 [Session 2]
Assume that the diode in the figure has \(V_{on} = 0.7\) V, but is otherwise ideal.

The magnitude of the current \(i_2\) (in mA) is equal to _____

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Showing 20 of 43 questions