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Practice Computer Organization - Digital Circuits - Electronics & Communication Engineering previous year questions organised from real papers, with year-wise coverage and clear topic navigation.
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| Paper name | Year | Attempt | |
|---|---|---|---|
Electronics & Communication Engineering (EC) 20242024 | 2024 |
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Electronics & Communication Engineering (EC) 20212021 | 2021 | |
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Electronics & Communication Engineering (EC) 20202020 | 2020 | |
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Electronics & Communication Engineering (EC) 2017 [Session 1]2017 | 2017 | |
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Electronics & Communication Engineering (EC) 2016 [Session 1]2016 | 2016 | |
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Electronics & Communication Engineering (EC) 2016 [Session 3]2016 | 2016 | |
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Electronics & Communication Engineering (EC) 2014 [Session 2]2014 | 2014 | |
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Electronics & Communication Engineering (EC) 2014 [Session 4]2014 | 2014 | |
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Electronics & Communication Engineering (EC) 2013 [Session 1]2013 | 2013 | |
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Electronics & Communication Engineering (EC) 2013 [Session 2]2013 | 2013 | |
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Electronics & Communication Engineering (EC) 2013 [Session 3]2013 | 2013 | |
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Electronics & Communication Engineering (EC) 2013 [Session 4]2013 | 2013 | |
|
Electronics & Communication Engineering (EC) 20112011 | 2011 | |
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Electronics & Communication Engineering (EC) 20102010 | 2010 | |
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Electronics & Communication Engineering (EC) 20092009 | 2009 | |
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Electronics & Communication Engineering (EC) 20082008 | 2008 | |
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Electronics & Communication Engineering (EC) 20072007 | 2007 | |
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Practice every matching question in batches of 20, with every available option.
An 8255 chip is interfaced to an 8085 microprocessor system as an I/O mapped I/O as shown in the figure. The address lines \(A_0\) and \(A_1\) of the 8085 are used by the 8255 chip to decode internally its three ports and the Control register. The address lines \(A_3\) to \(A_7\) as well as the \(IO/\overline{M}\) signal are used for address decoding. The range of addresses for which the 8255 chip would get selected is
In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected. Such an interrupt is
For the 8085 assembly language program given below, the content of the accumulator after the execution of the program is
A machine has a 32-bit architecture with 1-word long instructions. It has 24 registers and supports an instruction set of size 40. Each instruction has five distinct fields, namely opcode, two source register identifiers, one destination register identifier, and an immediate value. Assuming that the immediate operand is an unsigned integer, its maximum value is ________.