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Exam Details

ISROElectronics & Communication Engineering 2012

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Questions 80
Duration 180 mins
Package ESE & GATE EC - Previous Year Papers

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Difficulty distribution

Medium 58 72.5%
Easy 13 16.3%
Hard 9 11.3%

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Multiple Choices 80 100%

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Sample questions from this paper

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1
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
1 cm3 of pure Germanium at 20 °C contains about 4.2×1022 atoms, 2.5×1013 free electrons and 2.5×1013 holes. 0.001% of Arsenic doping donates an extra 1017 free electrons in the same volume. The approximate number of holes in one cm3 in the doped semiconductor under equilibrium condition is:
A
6.25×109
B
10.5×109
C
1017
D
2.5×109
2
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
Measurement of Hall coefficient enables the determination of:
A
Temperature coefficient and thermal conductivity
B
Mobility and concentration of charge carriers
C
None of the above
D
Fermi level and forbidden energy gap
3
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
Silicon is not suitable for fabrication of light emitting diodes because it is:
A
An indirect band gap semiconductor
B
A wide band gap semiconductor
C
A narrow band gap semiconductor
D
A direct band gap semiconductor
4
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
The band gap of elements arranged in ascending order is:
A
Diamond, Ge, Si
B
Si, Ge, Diamond
C
Ge, Si, Diamond
D
Diamond, Si, Ge
5
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
The following statements are made for NMOS and PMOS(1). The carrier mobility in NMOS is higher(2). PMOS require less area than NMOS(3). NMOS circuits are smaller than PMOS(4). PMOS are faster in switching.Of these, the true statements are:
A
2 and 4 only
B
2 and 3 only
C
1 and 3 only
D
1, 2 and 3 only
6
2012 · Unclassified
ISROElectronics & Communication Engineering 2012
The following statements are made for FETs(1). In n-channel depletion mode MOS in the active region, the control voltage VGS is negative.(2). NMOS in depletion mode is cut off for VGS = 0(3). NMOS in enhance mode is cutoff for VGS = 0(4). There is no path between source and drain in the enhancement mode initially Of these, the true statements are:
A
1 and 2 only
B
1 and 3 only
C
3 and 4 only
D
1, 3 and 4 only