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Previous year question hub

Data Converters - Digital Circuits - Electronics & Communication Engineering Previous Year Questions

Practice Data Converters - Digital Circuits - Electronics & Communication Engineering previous year questions organised from real papers, with year-wise coverage and clear topic navigation.

6Papers
6Years
6Questions
1Topics

Data Converters question pattern

Every graph below is calculated only from this selection.

Questions by year

Year-wise coverage for Data Converters. Each bar uses a separate theme-derived color.

Difficulty distribution

How the classified questions are distributed by difficulty.

Medium 3 50%
Easy 3 50%

Question type distribution

MCQ, numerical, multiple-select and other formats found in these papers.

MCQ 3 50%
Numerical Answer Type (NAT) 3 50%

Subject weightage

Top subjects by unique question coverage.

Electronics & Communication Engineering
6 Qs

Most asked topics

Top topics across the included previous year papers.

Digital Circuits
6 Qs

Subtopic coverage

Top subtopics inside this exact selection.

Data Converters
6 Qs

Paper coverage

Question coverage for the most populated papers. Every active PYP paper remains listed below.

Electronics & Communication Engineering (EC) 2025
1 Qs
Electronics & Communication Engineering (EC) 2024
1 Qs
Electronics & Communication Engineering (EC) 2023
1 Qs
Electronics & Communication Engineering (EC) 2021
1 Qs
Electronics & Communication Engineering (EC) 2020
1 Qs
Electronics & Communication Engineering (EC) 2016 [Session 2]
1 Qs

Included previous year papers

Newest papers appear first. Sort by year, question coverage or name.

PaperYear / sessionQuestions in this viewOpen
Electronics & Communication Engineering (EC) 202520251View paper
Electronics & Communication Engineering (EC) 202420241View paper
Electronics & Communication Engineering (EC) 202320231View paper
Electronics & Communication Engineering (EC) 202120211View paper
Electronics & Communication Engineering (EC) 202020201View paper
Electronics & Communication Engineering (EC) 2016 [Session 2]20161View paper

All Data Converters previous year questions

Practice every matching question in batches of 20, with every available option.

1
2016 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2016 [Session 2]
In an N bit flash ADC, the analog voltage is fed simultaneously to \(2^N - 1\) comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source \(V_{in}\) (whose output is being converted to digital format) has a source resistance of 75 \(\Omega\) as shown in the circuit diagram below and the input capacitance of each comparator is 8 pF. The input must settle to an accuracy of 1/2 LSB even for a full scale input change for proper conversion. Assume that the time taken by the thermometer to binary encoder is negligible. If the flash ADC has 8 bit resolution, which one of the following alternatives is closest to the maximum sampling rate ?
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2
2020 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2020
A 10-bit D/A converter is calibrated over the full range from 0 to 10 V. If the input to the D/A converter is 13A (in hex), the output (rounded off to three decimal places) is __________ V.
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3
2021 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2021
An 8-bit unipolar (all analog output values are positive) digital-to-analog converter (DAC) has a full-scale voltage range from 0 V to 7.68 V. If the digital input code is 10010110 (the leftmost bit is MSB), then the analog output voltage of the DAC (rounded off to one decimal place) is __________ V.
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4
2023 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2023

The signal-to-noise ratio (SNR) of an ADC with a full-scale sinusoidal input is given to be 61.96 dB. The resolution of the ADC is ______ bits (rounded off to the nearest integer).

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5
2024 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2024
A full scale sinusoidal signal is applied to a 10-bit ADC. The fundamental signal component in the ADC output has a normalized power of 1 W, and the total noise and distortion normalized power is 10 μW. The effective number of bits (rounded off to the nearest integer) of the ADC is ________.
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6
2025 · Electronics & Communication Engineering · Digital Circuits · Data Converters
Electronics & Communication Engineering (EC) 2025
A 10-bit analog-to-digital converter (ADC) has a sampling frequency of 1 MHz and a full scale voltage of 3.3 V.
For an input sinusoidal signal with frequency 500 kHz, the maximum SNR (in dB, rounded off to two decimal places) and the data rate (in Mbps) at the output of the ADC are __________, respectively.
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